We’re about to enter a very unique era in the world of silicon fabrication. The currently-used FinFET transistors have been in use since 2011, but as nodes continue to shrink they will need to be replaced by something different. We are now approaching that inflection point, with TSMC recently updating its roadmap to note it’ll be moving to nanosheet transistors once it’s ready for 2nm production. That won’t be for a few more years and Intel and Samsung have announced similar plans.
News of TSMC’s updated roadmap comes in a report from EEtimes, which discusses the company’s future plans. It’s already been widely reported that TSMC will begin its 3nm production at the end of 2022, but this new report confirms its nanosheet plans beyond that. Nanosheets are a type of Gate-All-Around (GAA) transistor that features floating transistor fins with the gate around them, hence the name. Intel has announced similar plans with what it calls RibbonFET. Interestingly TSMC says it expects 2nm nanosheet production to begin in 2025, but Intel’s roadmap has RibbonFET debuting in Q3 of 2024. For its part, Samsung has already shifted to nanowires, which uses thinner fins than nanosheets, for its 3nm process.
One thing to keep in mind when comparing TSMC and Intel is that the two companies have sometimes defined “volume production” a bit differently. Historically, Intel announced volume production a relatively short time before it launched products into the retail market. Because TSMC sells products to customers that then perform their own device integration, it can take longer for the company to move from volume production to commercially available products. There’s likely to be some slippage between the timelines companies are announcing today and what they actually ship.
The company recently showed its 3nm technology to President Biden in South Korea.
One of the reasons TSMC won’t be moving to 2nm in the near future is it plans to use 3nm for quite some time. Kevin Zhang, VP of business development, said TSMC’s expects it to be a popular node. “We do believe 3 nm will be a long node. We will continue to see high–volume demand on that node. But in terms of transition from 3 nm to 2 nm… nanosheet has a unique advantage in terms of further enhancing energy and computational efficiency because of the transistor architecture. We would expect customers with products that require more energy efficiency in terms of computational requirement, they will move to 2 nm first,” he said. TSMC also expects to sell 3nm products alongside 2nm as well.
EETimes notes that Samsung is already moving forward with its GAA plans at 3nm, which seemingly gives it a head start on its competition. However, Bernstein analyst Mark Li believes such an early departure from FinFET could spook customers like Qualcomm and Nvidia. Any time there’s a monumental technology shift like this there will be issues, especially with yields. This could motivate companies to use the “old” 3nm technology longer, or until GAA designs are more mature. Zhang says because of this, it will sell both 3nm and 2nm alongside one another.
Still, the move away from FinFET should allow for significant advances in transistor density and efficiency. Samsung has stated its 3nm nanowire design offers an 80 percent boost in transistor density compared to its 7nm process. It also allows for a 30 percent performance boost, or a 50 percent improvement in efficiency.